2018-03-29 |
ARM: aarch64: Add esr strings
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The Exception Syndrome Register (ESR) holds information over an
exception. This adds the strings necessary to dispatch this information.
Based on Linux code.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Sascha Hauer
committed
on 29 Mar 2018
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ARM: aarch64: Allow to leave exceptions
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So far exceptions can only be entered but never left. Add code to leave
exceptions based on U-Boot commit 4c2cc7c4e (arm64: Allow exceptions to return).
This will be useful to implement ignoring data aborts on a 'md' command.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Sascha Hauer
committed
on 29 Mar 2018
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ARM: aarch64: mmu: Make zero page faulting
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Make zero page faulting which allows us to catch NULL pointer derefs.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Sascha Hauer
committed
on 29 Mar 2018
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ARM: aarch64: implement stacktraces
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Implement stacktraces as a great debugging aid. On aarch64 this is cheap
enough to be enabled unconditionally. Unwinding code is taken from the
Kernel.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Sascha Hauer
committed
on 29 Mar 2018
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ARM: aarch64: implement show_regs()
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Do something useful in an exception and at least print the current
register contents.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Sascha Hauer
committed
on 29 Mar 2018
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ARM: aarch64: hide some config options
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EABI and ATAGS have no meaning on aarch64, so hide the options from the
user.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Sascha Hauer
committed
on 29 Mar 2018
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ARM: aarch64: remove dead code in linker script
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CONFIG_ARM_UNWIND does not exist for aarch64. Remove the dead code.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Sascha Hauer
committed
on 29 Mar 2018
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ARM: aarch64: lowlevel: Use switch_el
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Use switch_el macro rather than open coded version. While at it rename the
labels so that the name matches the exception level.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Sascha Hauer
committed
on 29 Mar 2018
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ARM: aarch64: Setup exception vectors in initcall
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The vectors are currently configured in arm_cpu_lowlevel_init(). This
shall be callable from PBL, but here the vectors are not available so
calling it from PBL will result in a linker error.
Move the vector setup to an initcall.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Sascha Hauer
committed
on 29 Mar 2018
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ARM: aarch64: fix exception level mixup
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When entering an exception the we currently jump to the code handling
EL1 when we are actually at EL3 and the other way round. Fix this by
introducing and using the switch_el macro from U-Boot.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Sascha Hauer
committed
on 29 Mar 2018
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ARM: aarch64: move aarch64 exception support to separate file
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The exception support for arm32 and aarch64 does not have much in
common. Move aarch64 exception support to a separate file to avoid
more ifdeffery.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Sascha Hauer
committed
on 29 Mar 2018
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ARM: aarch64: compile with strict alignment
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barebox runs with MMU disabled at least during startup. We need
-mstrict-alignment for these parts to avoid alignment aborts.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Sascha Hauer
committed
on 29 Mar 2018
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ARM: aarch64: implement dma operations
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For proper DMA support dma_alloc_coherent and DMA sync operations are
needed. Implement them.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Sascha Hauer
committed
on 29 Mar 2018
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ARM: implement dma mapping functions
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Implement basic dma mapping functions. For now just assume every address
is valid for dma mapping.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Sascha Hauer
committed
on 29 Mar 2018
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dma: Add prototypes for dma mapping functions
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Right now we only have the dma_sync_single_* functions, but no functions
for actually mapping a pointer. The mapping functions become necessary
when casting a pointer to unsigned long to get a dma address is not
enough. (I'm not even going so far that we'll add IOMMU support, but on
some architectures we need a place where we can check if a pointer is
DMA mappable at all)
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Sascha Hauer
committed
on 29 Mar 2018
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dma: Use dma_addr_t as type for DMA addresses
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DMA addresses are not necessarily the same as unsigned long. Fix
the type for the dma_sync_single_* operations.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Sascha Hauer
committed
on 29 Mar 2018
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2018-03-26 |
video: tc358767: set num_modes=0 if no valid mode found
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Since commit f986661 "video: ipu: register framebuffer,
even when no modes are found" value returned from
VPL_GET_VIDEOMODES ioctl is ignored. So set valid num_modes
in error case to avoid crash in register_framebuffer.
Signed-off-by: Andrey Gusakov <andrey.gusakov@cogentembedded.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Andrey Gusakov
authored
on 23 Mar 2018
Sascha Hauer
committed
on 26 Mar 2018
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i.MX53/TX53: add new samsung based xx30 variant
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Karo is deploying their latest tx53 modules with samsung instead of
nanya ram. Unfortunatly the still keep the old revision for that
modules. We add this modules as an extra xx30 samsung variant.
Signed-off-by: Michael Grzeschik <m.grzeschik@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Michael Grzeschik
authored
on 23 Mar 2018
Sascha Hauer
committed
on 26 Mar 2018
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i.MX/DCD compiler and interpreter: logic is different
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Reading the manual more carefully discovers a different logic for the
DCD 'check' command. They use the term "until". In order to get the
manual and the software in sync, this change switches to the term
"until" as well. Changing must happen at compiler and interpreter level
to make it work.
Signed-off-by: Juergen Borleis <jbe@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Juergen Borleis
authored
on 23 Mar 2018
Sascha Hauer
committed
on 26 Mar 2018
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i.MX53/TX53: rework to dts based boot
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Since nobody likes to use platformcode based machines any more, we also
switch this one to use dts based booting.
Signed-off-by: Michael Grzeschik <m.grzeschik@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Michael Grzeschik
authored
on 23 Mar 2018
Sascha Hauer
committed
on 26 Mar 2018
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i.MX53/TX53: cfg revxx30: don't disable usb clks, so imx-usb-loader works
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In the current configuration the usb related clocks get disabled
immediately which breaks the imx-usb-loader boot. We fix that by leaving
them enabled.
Signed-off-by: Michael Grzeschik <m.grzeschik@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Michael Grzeschik
authored
on 23 Mar 2018
Sascha Hauer
committed
on 26 Mar 2018
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watchdog: add watchdog poller
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In some cases it is practical to supervise as much as possible of
the barebox execution with a watchdog (or multiple watchdogs). This
patch provides an async poller for watchdog core framework which can
be enabled by the user and stores this configuration to nv.
Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Oleksij Rempel
authored
on 19 Mar 2018
Sascha Hauer
committed
on 26 Mar 2018
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2018-03-23 |
ARM: Make some variables 64bit aware
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Use unsigned long as type for variables that are used as addresses.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Sascha Hauer
committed
on 23 Mar 2018
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ARM: aarch64: mmu: Fix disabling the MMU
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Do it as U-Boot: Disable MMU first, then flush caches and finally
invalidate tlbs. I wish I could reference some document instead of
U-Boot code, but I haven't found anything.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Sascha Hauer
committed
on 23 Mar 2018
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ARM: aarch64: mmu: drop ttb check when disabling the MMU
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If the MMU is enabled then we should be able to disable it, no
matter if we initialized it in barebox or not. This change is not
really needed but helps when we are starting second stage from U-Boot
with the 'go' command which leaves the MMU enabled.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Sascha Hauer
committed
on 23 Mar 2018
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ARM: aarch64: mmu: No need to disable icache
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When the MMU is disabled there is no need to disable the icache. Leave
it enabled.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Sascha Hauer
committed
on 23 Mar 2018
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ARM: aarch64: mmu: Fix TCR setting
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A BITS_PER_VA value of 33 is a little small. Increase it to 39 which is
the maximum size we can do with 3 level page tables. The TCR value
depends on the current exception level, so we have to calculate the
value during runtime. To do this use a function derived from U-Boots
get_tcr function.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Sascha Hauer
committed
on 23 Mar 2018
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ARM: aarch64: mmu: Fix PTE_TYPE_* flags
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When we reach level 3 page tables we set the PTE_TYPE_PAGE bit in attr.
This is wrong since in the outer loop we can fall back to a lower level
in which case the PTE_TYPE_PAGE may not be set.
Fix this by not modifying attr and instead compose the *pte value when
needed.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Sascha Hauer
committed
on 23 Mar 2018
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ARM: aarch64: mmu: Fix adding additional page table levels
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When we create a higher level page table we have to initialize it
with the settings from the previous lower level page table so that
we do not modify unrelated mappings. split_block() is taken from
U-Boot code and does this job.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Sascha Hauer
committed
on 23 Mar 2018
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ARM: aarch64: mmu: use PTE_* definitions from U-Boot
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'PMD' (Page Middle Directory) is a Linuxism that is not really
helpful in the barebox MMU code. Use the U-Boot definitions
which only use PTE_* and seem to be more consistent for our
usecase.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Sascha Hauer
committed
on 23 Mar 2018
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