LuminaSensum/barebox

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LuminaSensum / barebox

2018-08-13	1c1d44b Browse files » ARM: i.MX: boot: Fix accidental comma ... Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Andrey Smirnov authored on 10 Aug 2018 Sascha Hauer committed on 13 Aug 2018
	5d2fefe Browse files » ARM: i.MX8M: Expose code to query cpu revision ... CPU revision information is needed for boot source detection, so expose it as a small helper function and convert existing code to use it. Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Andrey Smirnov authored on 10 Aug 2018 Sascha Hauer committed on 13 Aug 2018
	57b8a4d Browse files » pinctrl: i.MX: Add code to parse "input-enable" ... Add code to parse "input-enable" and intepret it as SION bit. This is needed for I2C configuration on i.MX8MQ EVK board. Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Andrey Smirnov authored on 10 Aug 2018 Sascha Hauer committed on 13 Aug 2018
	660ea90 Browse files » i.MX: Select DRIVER_SPI_IMX_2_3 for i.MX8MQ ... Select DRIVER_SPI_IMX_2_3 for i.MX8MQ since that is the variant that's being used Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Andrey Smirnov authored on 10 Aug 2018 Sascha Hauer committed on 13 Aug 2018
	db8a118 Browse files » i.MX: i2c: Fix build error in debug output code ... Looks like that particular chunk of the code have not been built in a while and bitrotted. Change function parameters appropriately to avoid breaking the build. Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Andrey Smirnov authored on 10 Aug 2018 Sascha Hauer committed on 13 Aug 2018
	fa19953 Browse files » ARM: i.MX: freescale-mx6sx-sabresdb: Make ar8031_phy_fixup static ... Declare ar8031_phy_fixup as static since it is not being exported to any other users. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Andrey Smirnov authored on 10 Aug 2018 Sascha Hauer committed on 13 Aug 2018
2018-08-10	429c1a3 Browse files » ARM: VFxxx: zii-vf610-dev: Make get_sytem_type() static ... There's no reason for that function to be non-static, so convert it. Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Andrey Smirnov authored on 9 Aug 2018 Sascha Hauer committed on 10 Aug 2018
	81bd44f Browse files » ARM: VFxxx: zii-vf610-dev: Add newline before error banner ... Add a cosmetic newline to the beginning of the error banner printed when we encounter unidentified board type. This way we'd avoid artifacts like: barebox@ZII RDU1 Board:/ >********************************* * Unknown system type: 00000004 Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Andrey Smirnov authored on 9 Aug 2018 Sascha Hauer committed on 10 Aug 2018
	f4d74a5 Browse files » net: eth: Make use of ETH_ALEN ... Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Andrey Smirnov authored on 9 Aug 2018 Sascha Hauer committed on 10 Aug 2018
	68de5ef Browse files » Documentation: fix code block and literal block highlighting ... Use shell script highlighting where it is resonable, use console highlighting for transcripts, and fix some of the few cases where the syntax was broken, resulting in text not being rendered at all. Signed-off-by: Roland Hieber <r.hieber@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Roland Hieber authored on 9 Aug 2018 Sascha Hauer committed on 10 Aug 2018
	c3b5e27 Browse files » FIT: be more verbose when RSA signature check fails ... Tell the user what device tree node we're looking for. Signed-off-by: Roland Hieber <r.hieber@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Roland Hieber authored on 9 Aug 2018 Sascha Hauer committed on 10 Aug 2018
	90245eb Browse files » fs: ramfs: get chunks zero initialized ... Initialize new chunks to zero, otherwise a ->truncate call may result in uninitialized data in files. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Sascha Hauer committed on 10 Aug 2018
	8b8dcd3 Browse files » commands: teach commands that write to files to also create them ... This allows to use the adapted commands on non-existing files which failed before with open: No such file or directory Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Uwe Kleine-König authored on 9 Aug 2018 Sascha Hauer committed on 10 Aug 2018
	686d35f Browse files » libfile: open_and_lseek: enlarge small files enough to make lseek possible ... This makes the following do the expected thing: barebox@barebox sandbox:/ ls -l lala -rwxrwxrwx 4 lala barebox@barebox sandbox:/ mw -d lala 72 0 Without this patch mw dies with lseek: Invalid argument memset, memcpy and probably others benefit in the same way. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Uwe Kleine-König authored on 9 Aug 2018 Sascha Hauer committed on 10 Aug 2018
	cde598f Browse files » libfile: open_and_lseek: don't imply O_RDONLY ... There are several users that pass O_RDWR or O_WRONLY in mode to open_and_lseek() and use the resulting file descriptor for writing. This is no real issue becauce O_RDONLY is 0 and so can be dropped without any side effects. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Uwe Kleine-König authored on 9 Aug 2018 Sascha Hauer committed on 10 Aug 2018
	293e793 Browse files » mx5: Implement Spectre v2 workaround for Cortex-A8 ... Since 4.18-rc1 kernel the following warning is seen on i.MX51 and i.MX53: CPU0: Spectre v2: firmware did not set auxiliary control register IBE bit, system vulnerable Implement the suggested workaround by setting the IBE bit in the auxiliary control register, which allows the kernel to flush the BTB properly. Based on commit 7b37a9c732bf ("ARM: Introduce ability to enable ACR::IBE on Cortex-A8 for CVE-2017-5715") from U-Boot. With this patch applied the kernel now reports: CPU0: Spectre v2: using BPIALL workaround Tested on a imx51 babbage. Signed-off-by: Fabio Estevam <festevam@gmail.com> Reviewed-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Fabio Estevam authored on 12 Jul 2018 Sascha Hauer committed on 10 Aug 2018
2018-08-09	1df07fb Browse files » scripts/dtc: Reenable fdtget ... compilation of fdtget was lost during the update to version 1.4.6. We need this tool internally for the build process when imd support is enabled. Apparently our dtc code comes from the Kernel which doesn't have the upstream version of fdtget.c and it doesn't compile. This patch changes fdtget.c to the upstream version as of 1.4.6. This isn't noticed in the Kernel because fdtget isn't compiled there. Fixes: 8a8982541 scripts/dtc: Update to upstream version 1.4.6 Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Sascha Hauer committed on 9 Aug 2018
	635c1f1 Browse files » gpio: fix missing includes for bool and struct list_head ... Signed-off-by: Roland Hieber <r.hieber@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Roland Hieber authored on 30 Jul 2018 Sascha Hauer committed on 9 Aug 2018
	e60e7c3 Browse files » ARM: i.MX: OCOTP: fix missing include for uint32_t etc. ... Signed-off-by: Roland Hieber <r.hieber@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Roland Hieber authored on 30 Jul 2018 Sascha Hauer committed on 9 Aug 2018
	70533f1 Browse files » ARM: i.MX: HAB: fix missing include for EPERM ... Signed-off-by: Roland Hieber <r.hieber@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Roland Hieber authored on 30 Jul 2018 Sascha Hauer committed on 9 Aug 2018
	77f3378 Browse files » mci: imx-esdhc: send required clock pulses to card on init ... MMC cards need at least 74 clock pulses before any bus communication can occur. The i.MX SDHC controller auto-gates the clock when inactive, so if the SD enumeration is skipped for slots where we know that only a MMC card can be present (which is possible since b5289b742a89 "mmc: allow skipping SD card initialization") those inititialization clock pulses won't be sent out, resulting in command timeouts when trying to enumerate the card. Luckily the eSDHC controller has a hardware feature to send out 80 clock pulses. This has been validated to be available by checking the reference manual back to i.MX25. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Lucas Stach authored on 25 Jul 2018 Sascha Hauer committed on 9 Aug 2018
	107ac10 Browse files » firmware: Fix copy-paste comment mistake ... Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Andrey Smirnov authored on 19 Jul 2018 Sascha Hauer committed on 9 Aug 2018
	2a33a23 Browse files » ARM: nxp-imx8mq-evk: Add bootflow comments ... Add some notes on how the boot-flow goes while I still remember it. Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Andrey Smirnov authored on 19 Jul 2018 Sascha Hauer committed on 9 Aug 2018
	58a377c Browse files » ARM: i.MX8MQ: Query and display ATF fimware hash if available ... Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Andrey Smirnov authored on 19 Jul 2018 Sascha Hauer committed on 9 Aug 2018
	5026e11 Browse files » ARM: nxp-imx8mq-evk: Add code to load ATF BL31 blob ... Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Andrey Smirnov authored on 19 Jul 2018 Sascha Hauer committed on 9 Aug 2018
	f27ab16 Browse files » ARM: i.MX: xload-esdhc: Allow placing image to align its entry point ... Allow placing image to align its entry point with a particular entry point address. This is needed for SoC's like i.MX8M where vendor-provided ARM Trusted Firmware blob will exit at specific pre-determined address and we need to be able to pick execution up from there. Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Andrey Smirnov authored on 19 Jul 2018 Sascha Hauer committed on 9 Aug 2018
	4967ffe Browse files » ARM: i.MX: xload-esdhc: Make use of <mach/imx-header.h> ... Convert esdhc_start_image() to use constants and data types from <mach/imx-header.h>. Also, while at it, define a simple inline function to test if an arbitrary binary blob is i.MX flash header v2. Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Andrey Smirnov authored on 19 Jul 2018 Sascha Hauer committed on 9 Aug 2018
	f781879 Browse files » ARM: i.MX: Move i.MX header definitions to mach-imx ... Move i.MX header definitions from scripts to mach-imx in order to make it available to both script and bootloader code. Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Andrey Smirnov authored on 19 Jul 2018 Sascha Hauer committed on 9 Aug 2018
2018-08-08	f9fc825 Browse files » ARM: Mark SP as being clobbered in arm_setup_stack() ... Not sure why it was working before, but with recent update of AArch64 GCC to 8.1.1 on my Fedora 28 machine, compiling barebox_arm_entry() yields the following assembly: 0000000000002aac <barebox_arm_entry>: 2aac: a9bd7bfd stp x29, x30, [sp, #-48]! 2ab0: d1404023 sub x3, x1, #0x10, lsl #12 2ab4: d1004063 sub x3, x3, #0x10 2ab8: 910003fd mov x29, sp 2abc: 8b000063 add x3, x3, x0 2ac0: a90153f3 stp x19, x20, [sp, #16] 2ac4: aa0003f3 mov x19, x0 2ac8: aa0103f4 mov x20, x1 2acc: f90017e2 str x2, [sp, #40] <-- storing 'boarddata' on old stack 2ad0: 9100007f mov sp, x3 <-- setting up new stack 2ad4: 97ffffdd bl 2a48 <arm_early_mmu_cache_invalidate> 2ad8: f94017e2 ldr x2, [sp, #40] <--- sadness 2adc: aa1403e1 mov x1, x20 2ae0: aa1303e0 mov x0, x19 2ae4: 940000a1 bl 2d68 <barebox_multi_pbl_start> Which result in AArch64 image (i.MX8MQ) not being bootable. With SP marked as clobbered, the above assembly changes to the following: 0000000000002aac <barebox_arm_entry>: 2aac: a9bd7bfd stp x29, x30, [sp, #-48]! 2ab0: d1404023 sub x3, x1, #0x10, lsl #12 2ab4: d1004063 sub x3, x3, #0x10 2ab8: 910003fd mov x29, sp 2abc: a90153f3 stp x19, x20, [sp, #16] 2ac0: 8b000063 add x3, x3, x0 2ac4: aa0003f3 mov x19, x0 2ac8: aa0103f4 mov x20, x1 2acc: f90017a2 str x2, [x29, #40] 2ad0: 9100007f mov sp, x3 2ad4: 97ffffdd bl 2a48 <arm_early_mmu_cache_invalidate> 2ad8: f94017a2 ldr x2, [x29, #40] 2adc: aa1403e1 mov x1, x20 2ae0: aa1303e0 mov x0, x19 2ae4: 940000a1 bl 2d68 <barebox_multi_pbl_start> now x29 is used to access stored x2 which avoids the problem and allows the system to boot correctly. The change is a no-op on AArch32. Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Andrey Smirnov authored on 7 Aug 2018 Sascha Hauer committed on 8 Aug 2018
2018-08-08	cc13a61 Browse files » ARM: phytec-som-am335x: make autoenable actually usable ... IS_ENABLED has to be passed the full symbol name including the CONFIG_ prefix. Otherwise IS_ENABLED evaluates to 0. Fixes: 2877e08f9e1a ("ARM: phytec-som-am335x: Add autoenable") Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> -- Cc: Daniel Schultz <d.schultz@phytec.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Uwe Kleine-König authored on 7 Aug 2018 Sascha Hauer committed on 8 Aug 2018